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| PI74AVC+16820 2.5V 10-Bit Flip-Flop with Dual and 3-State Outputs Features * PI74AVC+16820 is designed for low-voltage operation, VCC = 1.65V to 3.6V * True 24mA Balanced Drive @ 3.3V * IOFF supports Partial power-down operation * 3.6V I/O Tolerant inputs and outputs * All outputs contain a patented DDC (Dynamic DriveControl) circuit that reduces noise without degrading propagation delay. * Industrial operation: -40C to +85C * Packaging (Pb-free & Green available): - 56-pin 240-mil wide plastic TSSOP (A) Description Pericom Semiconductor's PI74AVC+16820, a 10-bit flip-flop designed for 1.65V to 3.6V VCC operation. It is designed with edge-triggered D-type flip- flops. On the positive transition of clock (CLK) input. The device provides true data at the Q outputs. A buffered output-enable (OE) input can be used to place the ten outputs in either a normal logic state (HIGH or LOW level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capacity to drive bus lines without the need for interface or pullup components. OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power-up or powerdown, OE should be tied to VCC through a pullup resistor whose minimum value is determined by the current sinking capability of the driver. Pin Configuration Block Diagram 1OE 1 2OE 28 2 C1 1D CLK D1 56 55 1Q1 3 1Q2 TO 9 OTHER CHANNELS 06-0172 1 PS8446E 06/01/06 PI74AVC+16820 2.5V 10-Bit Flip-Flop w/Dual and 3-State Outputs Maximum Ratings Truth Table each Flip-Flop(1) Inputs OEn L L L H CLK L X Dn H L X X Outputs Qn H L Qo Z (Above which the useful life may be impaired. For user guidelines, not tested.) Supply voltage range, VCC ...................................... -0.5V to +4.6V Input voltage range, VI ............................................. -0.5V to +4.6V Voltage range applied to any output in the high-impedance or power-off state, VO(1) ........ -0.5V to +4.6V Voltage range applied to any output in the high or low state, VO(1,2) ........................... -0.5V to VCC +0.5V Input clamp current, IIK (VI <0) ..................................... -50mA Output clamp current, IOK (VO <0)................................ -50mA Continuous output current, IO ........................................ 50mA Continuous current through each VCC or GND ........... 100mA Package thermal impedance, JA(3) .............................. 64C/W Storage Temperature range, Tstg ....................... -65C to 150C Notes: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 1. 2. 3. Input & output negative-voltage ratings may be exceeded if the input and output curent rating are observed. Output positive-voltage rating may be exceeded up to 4.6V maximum if the output current rating is observed. The package thermal impedance is calculated in accordance with JESD 51. Notes: 1. H = High Signal Level, L = Low Signal Level, X = Irrelevant; Z = High Impedance, Qo = Output Level before the indicated steady-state conditions were established. Pin Description Pin Name OE CLK Qn Dn GND VCC Description Output Enable Input (Active LOW) Clock Input (Active HIGH) 3-State Outputs Data Inputs Ground Power 06-0172 2 PS8446E 06/01/06 PI74AVC+16820 2.5V 10-Bit Flip-Flop w/Dual and 3-State Outputs Recommended Operating Conditions(1) Parameters VCC Description Supply Voltage Test Conditions Operating Data retention only VCC = 1.2V VIH High-level Input Voltage VCC = 1.65V to 1.95V VCC = 2.3V to 2.7V VCC = 3V to 3.6V VCC = 1.2V VIL Low-level Input Voltage VCC = 1.65V to 1.95V VCC = 2.3V to 2.7V VCC = 3V to 3.6V VI VO Input Voltage Output Voltage Active State 3-State VCC = 1.65V to 1.95V IOH High-level output current VCC = 2.3V to 2.7V VCC = 3V to 3.6V VCC = 1.65V to 1.95V IOL TV TA Low-level output current Input transition rise or fall rate Operating free-air temperature VCC = 2.3V to 2.7V VCC = 3V to 3.6V VCC = 1.65V to 3.6V -40 0 0 0 Min. 1.65 1.2 VCC 0.65 x VCC 1.7 2 GND 0.35 x VCC 0.7 0.8 3.6 VCC 3.6 -6 - 12 - 24 6 12 24 5 85 ns/V C mA V Max. 3.6 Units Notes: 1. All unused inputs must be held at VCC or GND to ensure proper device operation. 06-0172 3 PS8446E 06/01/06 PI74AVC+16820 2.5V 10-Bit Flip-Flop w/Dual and 3-State Outputs DC Electrical Characteristics (Over the Operating Range, TA = -40C +85C) Parameters Test Conditions(1) VCC 1.65V to 3.6V 1.65V 2.3V 3V 1.65V to 3.6V 1.65V 2.3V 3V 3.6V 0 3.6V 3.6V 2.5V VI = VCC or GND Data Inputs CO Outputs VO = VCC or GND 3.3V 2.5V 3.3V 2.5V 3.3V 40 4 4 6 6 8 8 pF Min. VCC -0.2V 1.2 1.75 2 0.2 0.45 0.55 0.8 2.5 10 10 mA V Typ. Max. Units IOH = -100A VOH IOH = -6mA, VIH = 1.07V IOH = -12mA, VIH = 1.7V IOH = -24mA, VIH = 2V IOL = 100A VOL IOL = 6mA, VIH = 0.57V IOL = 12mA, VIH = 0.7V IOL = 24mA, VIH = 0.8V II IOFF IOZ ICC Control Inputs CI VI = VCC or GND VI or VO = 3.6V VI = VCC or GND VO = VCC or GND, VO = 0 Notes: 1. Typical values are measured at TA = 25C. 06-0172 4 PS8446E 06/01/06 PI74AVC+16820 2.5V 10-Bit Flip-Flop w/Dual and 3-State Outputs Timing Requirements (Over recommended operating free-air temperature range, unless otherwise noted, see Figures 1 thru 4) VCC = 1.2V Min. fCLOCK Clock Frequency tW Pulse duration, CLK high or low tSU Setup time, data before CLK tH Hold time, data after CLK 6 5.7 1.2 Max. VCC = 1.5V 0.1V Min. Max. VCC = 1.8V 0.15V Min. Max. 150 3 3.5 1 VCC = 2.5V 0.2V Min. Max. 180 3 2.5 1 ns VCC = 3.3V 0.3V Min. Max. 180 MHz Units Switching Characteristics Parameters fMAX tPD tEN tDIS CLK OE OE From (Input) (Over recommended operating free-air temperature range, unless otherwise noted, see Figures 1 thru 4) To (Output) VCC = 1.2V Min. Max. VCC = 1.5V 0.1V Min. Max. VCC = 1.8V 0.15V Min. 150 Q Q Q 4 5.8 5 Max. VCC = 2.5V 0.2V Min. 180 3.2 5.1 4.6 Max. VCC = 3.3V 0.3V Min. 180 2.7 4.5 4.2 ns Max. MHz Units Operating Characteristics, TA= 25C Parameters Outputs Enabled Outputs Disabled Test Conditions VCC = 1.8V 0.15V Typical Cpd Power Dissipation Capacitance CL = 0pF, f = 10 MHz, 2 outputs switching 40 23 VCC = 2.5V 0.2V Typical 48 27 VCC = 3.3V 0.3V Typical 55 pF 32 Units 06-0172 5 PS8446E 06/01/06 PI74AVC+16820 2.5V 10-Bit Flip-Flop w/Dual and 3-State Outputs PARAMETER MEASUREMENT INFORMATION VCC = 1.2V and 1.5V 0.1V 2-ohm S1 2xVCC Open GND From Output Under Test CL = 15pF (See Note 1) Test tpd tPLZ/tPZL tPHZ/tPZH S1 Open 2 x VCC GND 2-ohm Load Circuit Timing Input tsu Data Input VCC/2 VCC VCC/2 0V th VCC VCC/2 0V Input tW VCC VCC/2 VCC/2 0V Voltage Waveforms Setup and Hold Times Voltage Waveforms Pulse Duration Output Control (Low Level Enabling) VCC VCC/2 tPZL VCC/2 VCC/2 tPLZ 0V VCC VOL +0.1V tPHZ VCC/2 VOH -0.1V VOL VOH 0V Input VCC/2 tPLH VCC/2 VCC/2 tPHL VCC/2 VCC 0V VOH Output Waveform 1 S1 at 2 x VCC (see Note 2) t PZH Output Waveform 2 S1 at GND (see Note 2) Output VOL Voltage Waveforms Propagation Delay Times Voltage Waveforms Enable and Disable Times Figure 1. Load Circuit and Voltage Waveforms Notes: 1. CL includes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. * All input impulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50, tR 2.0ns, tF 2.0ns. * The outputs are measured one at a time with one transition per measurement. * tPLZ and tPHZ are the same as tdis * tPZL and tPZH are the same as ten * tPLH and tPHL are the same as tpd 06-0172 6 PS8446E 06/01/06 PI74AVC+16820 2.5V 10-Bit Flip-Flop w/Dual and 3-State Outputs PARAMETER MEASUREMENT INFORMATION VCC = 1.8V 0.15V 1K-ohm S1 2xVCC Open GND From Output Under Test CL = 30pF (See Note 1) Test tpd tPLZ/tPZL tPHZ/tPZH S1 Open 2 x VCC GND 1K-ohm Load Circuit Timing Input tsu Data Input VCC/2 VCC VCC/2 0V th VCC VCC/2 0V Input tW VCC VCC/2 VCC/2 0V Voltage Waveforms Setup and Hold Times Voltage Waveforms Pulse Duration Output Control (Low Level Enabling) VCC VCC/2 tPZL VCC/2 VCC/2 tPLZ 0V VCC VOL + 0.15V tPHZ VOL Input VCC/2 tPLH VCC/2 VCC/2 tPHL VCC/2 VCC 0V VOH Output Waveform 1 S1 at 2 x VCC (see Note 2) t PZH Output Waveform 2 S1 at GND (see Note 2) Output VOL VCC/2 V VOH - 0.15V OH 0V Voltage Waveforms Propagation Delay Times Voltage Waveforms Enable and Disable Times Figure 2. Load Circuit and Voltage Waveforms Notes: 1. CL includes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. * All input impulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50, tR 2.0ns, tF 2.0ns. * The outputs are measured one at a time with one transition per measurement. * tPLZ and tPHZ are the same as tdis * tPZL and tPZH are the same as ten * tPLH and tPHL are the same as tpd 06-0172 7 PS8446E 06/01/06 PI74AVC+16820 2.5V 10-Bit Flip-Flop w/Dual and 3-State Outputs PARAMETER MEASUREMENT INFORMATION VCC = 2.5V 0.2V S1 2xVCC Open GND From Output Under Test CL = 30pF (See Note 1) 500-ohm Test tpd tPLZ/tPZL tPHZ/tPZH S1 Open 2 x VCC GND 500-ohm Load Circuit Timing Input tsu Data Input VCC/2 VCC VCC/2 0V th VCC VCC/2 0V Input tW VCC VCC/2 VCC/2 0V Voltage Waveforms Setup and Hold Times Voltage Waveforms Pulse Duration Output Control (Low Level Enabling) VCC VCC/2 tPZL VCC/2 VCC/2 tPLZ 0V VCC VOL + 0.15V tPHZ VOL Input VCC/2 tPLH VCC/2 VCC/2 tPHL VCC/2 VCC 0V VOH Output Waveform 1 S1 at 2 x VCC (see Note 2) t PZH Output Waveform 2 S1 at GND (see Note 2) Output VOL VCC/2 V VOH - 0.15V OH 0V Voltage Waveforms Propagation Delay Times Voltage Waveforms Enable and Disable Times Figure 3. Load Circuit and Voltage Waveforms Notes: 1. CL includes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. * All input impulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50, tR 2.0ns, tF 2.0ns. * The outputs are measured one at a time with one transition per measurement. * tPLZ and tPHZ are the same as tdis * tPZL and tPZH are the same as ten * tPLH and tPHL are the same as tpd 06-0172 8 PS8446E 06/01/06 PI74AVC+16820 2.5V 10-Bit Flip-Flop w/Dual and 3-State Outputs PARAMETER MEASUREMENT INFORMATION VCC = 3.3V 0.3V 500-ohm S1 2xVCC Open GND From Output Under Test CL = 30pF (See Note 1) Test tpd tPLZ/tPZL tPHZ/tPZH S1 Open 2 x VCC GND 500-ohm Load Circuit Timing Input tsu Data Input VCC/2 VCC VCC/2 0V th VCC VCC/2 0V Input tW VCC VCC/2 VCC/2 0V Voltage Waveforms Setup and Hold Times Voltage Waveforms Pulse Duration Output Control (Low Level Enabling) VCC VCC/2 tPZL VCC/2 VCC/2 tPLZ 0V VCC VOL + 0.3V tPHZ VCC/2 VOH - 0.3V VOL VOH 0V Input VCC/2 tPLH VCC/2 VCC/2 tPHL VCC/2 VCC 0V VOH Output Waveform 1 S1 at 2 x VCC (see Note 2) t PZH Output Waveform 2 S1 at GND (see Note 2) Output VOL Voltage Waveforms Propagation Delay Times Voltage Waveforms Enable and Disable Times Figure 4. Load Circuit and Voltage Waveforms Notes: 1. CL includes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. * All input impulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50, tR 2.0ns, tF 2.0ns. * The outputs are measured one at a time with one transition per measurement. * tPLZ and tPHZ are the same as tdis * tPZL and tPZH are the same as ten * tPLH and tPHL are the same as tpd 06-0172 9 PS8446E 06/01/06 PI74AVC+16820 2.5V 10-Bit Flip-Flop w/Dual and 3-State Outputs Packaging Mechanical: 56-pin TSSOP (A) Ordering Information Ordering Code PI74AVC+16820A PI74AVC+16820AE Package Code A A Package Description 56-pin, 240-mil wide plastic TSSOP Pb-free & Green, 56-pin, 240-mil wide plastic TSSOP Notes: * Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ * E = Pb-free & Green * Adding an X suffix = Tape/Reel Pericom Semiconductor Corporation * 1-800-435-2336 * www.pericom.com 06-0172 10 PS8446E 06/01/06 |
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